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137
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ASAP
2008
IEEE
186views Hardware» more  ASAP 2008»
15 years 10 months ago
Accelerating Nussinov RNA secondary structure prediction with systolic arrays on FPGAs
RNA structure prediction, or folding, is a computeintensive task that lies at the core of several search applications in bioinformatics. We begin to address the need for high-thro...
Arpith C. Jacob, Jeremy Buhler, Roger D. Chamberla...
122
Voted
EGH
2005
Springer
15 years 9 months ago
Split-plane shadow volumes
We present a novel method for rendering shadow volumes. The core idea of the method is to locally choose between Z-pass and Z-fail algorithms on a per-tile basis. The choice is ma...
Samuli Laine
100
Voted
DAC
2001
ACM
16 years 4 months ago
Automated Pipeline Design
The interlock and forwarding logic is considered the tricky part of a fully-featured pipelined microprocessor and especially debugging these parts delays the hardware design proce...
Daniel Kroening, Wolfgang J. Paul
108
Voted
ASPDAC
2008
ACM
88views Hardware» more  ASPDAC 2008»
15 years 5 months ago
REWIRED - Register Write Inhibition by Resource Dedication
We propose REWIRED (REgister Write Inhibition by REsource Dedication), a technique for reducing power during high level synthesis (HLS) by selectively inhibiting the storage of fun...
Pushkar Tripathi, Rohan Jain, Srikanth Kurra, Pree...
116
Voted
FPGA
2009
ACM
148views FPGA» more  FPGA 2009»
15 years 10 months ago
SmartOpt: an industrial strength framework for logic synthesis
In recent years, the maximum logic capacity of each successive FPGA family has been increasing by more than 50%, which motivates scalable solutions. Meanwhile, academic research i...
Stephen Jang, Dennis Wu, Mark Jarvin, Billy Chan, ...