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IFIP12
2007
15 years 3 months ago
Hardware Natural Language Interface
In this paper an efficient architecture for natural language processing is presented, implemented in hardware using FPGAs (Field Programmable Gate Arrays). The system can receive s...
Christos Pavlatos, Alexandros C. Dimopoulos, Georg...
111
Voted
FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
15 years 8 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
VIS
2004
IEEE
186views Visualization» more  VIS 2004»
16 years 3 months ago
Hardware-Accelerated Adaptive EWA Volume Splatting
We present a hardware-accelerated adaptive EWA volume splatting algorithm. EWA splatting combines a Gaussian reconstruction kernel with a low-pass image filter for high image qual...
Wei Chen, Liu Ren, Matthias Zwicker, Hanspeter Pfi...
MAM
2007
157views more  MAM 2007»
15 years 1 months ago
Executing large algorithms on low-capacity FPGAs using flowpath partitioning and runtime reconfiguration
This paper describes a new method of executing a software program on an FPGA for embedded systems. Rather than combine reconfigurable logic with a microprocessor core, this method...
Darrin M. Hanna, Michael DuChene
RECOMB
2003
Springer
16 years 2 months ago
Optimizing exact genetic linkage computations
Genetic linkage analysis is a challenging application which requires Bayesian networks consisting of thousands of vertices. Consequently, computing the likelihood of data, which i...
Dan Geiger, Maáyan Fishelson