1862 search results - page 54 / 373 » General Architecture for Hardware Implementation of Genetic ... |
152
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GECCO
2007
Springer
15 years 11 months ago
2007
Springer
Engineering design increasingly uses computer simulation models coupled with optimization algorithms to find the best design that meets the customer constraints within a time con...
161
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CASES
2008
ACM
15 years 7 months ago
2008
ACM
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
165
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DATE
2010
IEEE
15 years 10 months ago
2010
IEEE
—Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low comput...
112
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DSD
2007
IEEE
15 years 11 months ago
2007
IEEE
We present the architecture of digit-serial normal basis multiplier over GF(2m ). The multiplier was derived from the multiplier of Agnew et al. Proposed multiplier is scalable by...
151
Voted
IPPS
2007
IEEE
15 years 11 months ago
2007
IEEE
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...