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102
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TVLSI
2010
14 years 7 months ago
Discrete Buffer and Wire Sizing for Link-Based Non-Tree Clock Networks
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...
Rupak Samanta, Jiang Hu, Peng Li
112
Voted
CHI
2011
ACM
14 years 4 months ago
Materializing the query with facet-streams: a hybrid surface for collaborative search on tabletops
We introduce “Facet-Streams”, a hybrid interactive surface for co-located collaborative product search on a tabletop. Facet-Streams combines techniques of information visualiz...
Hans-Christian Jetter, Jens Gerken, Michael Zö...
FORTE
2011
14 years 4 months ago
Analyzing BGP Instances in Maude
Analyzing Border Gateway Protocol (BGP) instances is a crucial step in the design and implementation of safe BGP systems. Today, the analysis is a manual and tedious process. Resea...
Anduo Wang, Carolyn L. Talcott, Limin Jia, Boon Th...
187
Voted
FPGA
2011
ACM
330views FPGA» more  FPGA 2011»
14 years 4 months ago
CoRAM: an in-fabric memory architecture for FPGA-based computing
FPGAs have been used in many applications to achieve orders-of-magnitude improvement in absolute performance and energy efficiency relative to conventional microprocessors. Despit...
Eric S. Chung, James C. Hoe, Ken Mai
ICSE
2011
IEEE-ACM
14 years 4 months ago
Inference of field initialization
A raw object is partially initialized, with only some fields set to legal values. It may violate its object invariants, such as that a given field is non-null. Programs often ma...
Fausto Spoto, Michael D. Ernst