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ICCAD
1997
IEEE
147views Hardware» more  ICCAD 1997»
15 years 2 months ago
Built-in test generation for synchronous sequential circuits
We consider the problem of built-in test generation for synchronous sequential circuits. The proposed scheme leaves the circuit flip-flops unmodified, and thus allows at-speed ...
Irith Pomeranz, Sudhakar M. Reddy
EICS
2009
ACM
15 years 4 months ago
A responsibility-based pattern language for usability-supporting architectural patterns
Usability-supporting architectural patterns (USAPs) were developed as a way to explicitly connect the needs of architecturally-sensitive usability concerns to the design of softwa...
Bonnie E. John, Len Bass, Elspeth Golden, Pia Stol...
DAC
2000
ACM
15 years 10 months ago
Self-test methodology for at-speed test of crosstalk in chip interconnects
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Xiaoliang Bai, Sujit Dey, Janusz Rajski
AWIC
2003
Springer
15 years 3 months ago
Formalization of Web Design Patterns Using Ontologies
Design patterns have been enthusiastically embraced in the software engineering community as well as in the web community since they capture knowledge about how and when to apply a...
Susana Montero, Paloma Díaz, Ignacio Aedo
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
15 years 3 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...