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» Geometric programming for circuit optimization
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ICCAD
2001
IEEE
107views Hardware» more  ICCAD 2001»
15 years 8 months ago
A Convex Programming Approach to Positive Real Rational Approximation
As system integration evolves and tighter design constraints must be met, it becomes necessary to account for the non-ideal behavior of all the elements in a system. Certain devic...
Carlos P. Coelho, Joel R. Phillips, Luis Miguel Si...
WSC
2007
15 years 2 months ago
Optimizing time warp simulation with reinforcement learning techniques
Adaptive Time Warp protocols in the literature are usually based on a pre-defined analytic model of the system, expressed as a closed form function that maps system state to cont...
Jun Wang, Carl Tropper
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
15 years 8 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky
IPPS
2007
IEEE
15 years 6 months ago
Linking Compilation and Visualization for Massively Parallel Programs
This paper presents a technique to visualize the communication pattern of a parallel application at different points during its execution. Unlike many existing tools that show the...
Alex K. Jones, Raymond R. Hoare, Joseph St. Onge, ...
ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
15 years 6 months ago
ILP Based Gate Leakage Optimization Using DKCMOS Library during RTL Synthesis
In this paper dual-K (DKCMOS) technology is proposed as a method for gate leakage power reduction. An integer linear programming (ILP) based algorithm is proposed for its optimiza...
Saraju P. Mohanty