241 search results - page 11 / 49 » Geometry of synthesis: a structured approach to VLSI design |
109
click to vote
GLVLSI
2007
IEEE
15 years 8 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
139
click to vote
GLVLSI
2007
IEEE
15 years 8 months ago
2007
IEEE
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
101
click to vote
GLVLSI
2003
IEEE
15 years 7 months ago
2003
IEEE
Concerned by the wall that Moore’s Law is expected to hit in the next decade, the integrated circuit community is turning to emerging nanotechnologies for continued device impro...
122
click to vote
AUTOMATICA
2008
15 years 2 months ago
2008
In this paper we show how the symmetry present in many linear systems can be exploited to significantly reduce the computational effort required for controller synthesis. This app...
126
click to vote
GLVLSI
2000
IEEE
15 years 6 months ago
2000
IEEE
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new routing paradigm that strikes at the root of the i...