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ARITH
2005
IEEE
15 years 6 months ago
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
Silvia M. Müller, Christian Jacobi 0002, Hwa-...
ASAP
2005
IEEE
104views Hardware» more  ASAP 2005»
15 years 6 months ago
Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application
Users expect future handhelddevices to provide extended multimedia functionality and have long battery life. This type of application imposes heavy constraints on performance and ...
Andy Lambrechts, Praveen Raghavan, Anthony Leroy, ...
DATE
2005
IEEE
180views Hardware» more  DATE 2005»
15 years 6 months ago
A Coprocessor for Accelerating Visual Information Processing
Visual information processing will play an increasingly important role in future electronics systems. In many applications, e.g. video surveillance cameras, data throughput of mic...
Walter Stechele, L. Alvado Cárcel, Stephan ...
ICCV
2005
IEEE
15 years 6 months ago
Learning Effective Image Metrics from Few Pairwise Examples
We present a new approach to learning image metrics. The main advantage of our method lies in a formulation that requires only a few pairwise examples. Apparently, based on the li...
Hwann-Tzong Chen, Tyng-Luh Liu, Chiou-Shann Fuh
ICDE
2005
IEEE
123views Database» more  ICDE 2005»
15 years 6 months ago
Load and Network Aware Query Routing for Information Integration
Current federated systems deploy cost-based query optimization mechanisms; i.e., the optimizer selects a global query plan with the lowest cost to execute. Thus, cost functions in...
Wen-Syan Li, Vishal S. Batra, Vijayshankar Raman, ...