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FPGA
2003
ACM
123views FPGA» more  FPGA 2003»
15 years 8 months ago
Wire type assignment for FPGA routing
The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...
Seokjin Lee, Hua Xiang, D. F. Wong, Richard Y. Sun
DAC
2000
ACM
16 years 4 months ago
Memory aware compilation through accurate timing extraction
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
ICDCS
2009
IEEE
16 years 12 days ago
ISP Friend or Foe? Making P2P Live Streaming ISP-Aware
Abstract: Current peer-to-peer systems are network-agnostic, often generating large volumes of unnecessary inter-ISP traffic. Although recent work has shown the benefits of ISP-a...
Fabio Picconi, Laurent Massoulié
ISCA
1998
IEEE
126views Hardware» more  ISCA 1998»
15 years 7 months ago
Switcherland: A QoS Communication Architecture for Workstation Clusters
Computer systems have become powerful enough to process continuous data streams such as video or animated graphics. While processing power and communication bandwidth of today...
Hans Eberle, Erwin Oertli
CORR
2011
Springer
160views Education» more  CORR 2011»
14 years 10 months ago
When is social computation better than the sum of its parts?
good solutions to complex problems. In many examples, individuals trying to solve superior global solution. This suggests that there may be general principles of information aggre...
Vadas Gintautas, Aric A. Hagberg, Luís M. A...