3335 search results - page 155 / 667 » Grid result checking |
130
Voted
VLSISP
2010
15 years 2 months ago
2010
A Split decoding algorithm is proposed which divides each row of the parity check matrix into two or multiple nearly-independent simplified partitions. The proposed method signific...
239
Voted
PEPM
2009
ACM
17 years 3 months ago
2009
ACM
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
121
Voted
ICC
2008
IEEE
15 years 10 months ago
2008
IEEE
— Low-Density Parity-Check (LDPC) codes are typically characterized by a relatively high-complexity description, since a considerable amount of memory is required in order to sto...
127
Voted
GLVLSI
2007
IEEE
15 years 10 months ago
2007
IEEE
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (...
133
Voted
INFOCOM
2007
IEEE
15 years 10 months ago
2007
IEEE
—In recent literature, network coding has emerged as a promising information theoretic approach to improve the performance of both peer-to-peer and wireless networks. It has been...