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» Hardware Accelerated Power Estimation
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132
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ISCA
2011
IEEE
287views Hardware» more  ISCA 2011»
14 years 7 months ago
Scalable power control for many-core architectures running multi-threaded applications
Optimizing the performance of a multi-core microprocessor within a power budget has recently received a lot of attention. However, most existing solutions are centralized and cann...
Kai Ma, Xue Li, Ming Chen, Xiaorui Wang
137
Voted
CSREAESA
2006
15 years 5 months ago
Fast Run-Time Power Monitoring Methodology for Embedded Systems
Traditional simulation-based energy estimation is not practical because the simulation time has increased from minutes and hours and weeks. Therefore, simulation assisted by speci...
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
172
Voted
ISLPED
1997
ACM
130views Hardware» more  ISLPED 1997»
15 years 7 months ago
Analytical energy dissipation models for low-power caches
We present detailed analytical models for estimating the energy dissipation in conventional caches as well as low energy cache architectures. The analytical models use the run tim...
Milind B. Kamble, Kanad Ghose
IPPS
2007
IEEE
15 years 10 months ago
An Architectural Framework for Automated Streaming Kernel Selection
Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
246
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SIGCSE
2003
ACM
293views Education» more  SIGCSE 2003»
15 years 9 months ago
Creating a computer science canon: a course of "classic" readings in computer science
Computer science has a reputation of being a discipline in a perpetual state of accelerated progress—a discipline in which our techniques, our hardware, our software systems, an...
Michael Eisenberg