550 search results - page 52 / 110 » Hardware Accelerated Power Estimation |
111
Voted
VTS
2005
IEEE
15 years 9 months ago
2005
IEEE
Excessive power supply noise can lead to overkill during delay test. A static compaction algorithm is described in this paper that prevents such overkill. A power supply noise est...
119
Voted
ISCAS
2006
IEEE
15 years 9 months ago
2006
IEEE
— In this paper, we address the problem of FSM state assignment to minimize area and power. The objectives are targeted as single/independent as well as multi-objective optimizat...
123
Voted
ISCAS
2006
IEEE
15 years 9 months ago
2006
IEEE
Abstract— In this paper, we present an algorithm/architecturelevel design solution for implementing state-parallel adaptive Viterbi decoders that, compared with their Viterbi cou...
115
Voted
FPL
2003
Springer
15 years 8 months ago
2003
Springer
The power-efficient implementation of motion estimation algorithms on a system comprised by an FPGA and an external memory is presented. Low power consumption is achieved by implem...
110
Voted
ERSA
2007
15 years 5 months ago
2007
Molecular Dynamics simulations have become an interesting target for acceleration using Field-Programmable Gate Arrays (FPGA). Still to be attempted completely in FPGA hardware is...