114 search results - page 18 / 23 » Hardware Acceleration of HMMER on FPGAs |
ARC
2010
Springer
15 years 3 months ago
2010
Springer
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
MAM
2006
14 years 11 months ago
2006
FPGA placement and routing is time consuming, often serving as the major obstacle inhibiting a fast edit-compile-test loop in prototyping and development and the major obstacle pr...
CODES
2007
IEEE
15 years 6 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
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TVLSI
2002
14 years 11 months ago
2002
Due to its potential to greatly accelerate a wide variety of applications, reconfigurable computing has become a subject of a great deal of research. By mapping the compute-intens...
FPL
2008
Springer
15 years 1 months ago
2008
Springer
Due to continuous improvements in the resources available on FPGAs, it is becoming increasingly possible to accelerate floating point algorithms. The solution of a system of linea...