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» Hardware Architecture of a Parallel Pattern Matching Engine
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ICS
2010
Tsinghua U.
15 years 2 months ago
Small-ruleset regular expression matching on GPGPUs: quantitative performance analysis and optimization
We explore the intersection between an emerging class of architectures and a prominent workload: GPGPUs (General-Purpose Graphics Processing Units) and regular expression matching...
Jamin Naghmouchi, Daniele Paolo Scarpazza, Mladen ...
DATE
2005
IEEE
165views Hardware» more  DATE 2005»
15 years 3 months ago
Flexible Hardware/Software Support for Message Passing on a Distributed Shared Memory Architecture
With the advent of multi-processor systems on a chip, the interest for message passing libraries has revived. Message passing helps in mastering the design complexity of parallel ...
Francesco Poletti, Antonio Poggiali, Paul Marchal
102
Voted
IPPS
2007
IEEE
15 years 3 months ago
Using Rewriting Logic to Match Patterns of Instructions from a Compiler Intermediate Form to Coarse-Grained Processing Elements
This paper presents a new and retargetable method to identify patterns of instructions with direct support in coarsegrained processing elements (PEs). The method uses a three-addr...
Carlos Morra, João M. P. Cardoso, Jürg...
TVLSI
2010
14 years 4 months ago
Bandwidth Adaptive Hardware Architecture of K-Means Clustering for Video Analysis
K-Means is a clustering algorithm that is widely applied in many fields, including pattern classification and multimedia analysis. Due to real-time requirements and computational-c...
Tse-Wei Chen, Shao-Yi Chien
AINA
2008
IEEE
15 years 4 months ago
Multi-Character Processor Array for Pattern Matching in Network Intrusion Detection System
—Network Intrusion Detection System (NIDS) is a system developed for identifying attacks by using a set of rules. NIDS is an efficient way to provide the security protection for ...
Yeim-Kuan Chang, Ming-Li Tsai, Yu-Ru Chung