163 search results - page 19 / 33 » Hardware Performance Characterization of Block Cipher Struct... |
140
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ISCA
2012
IEEE
13 years 2 months ago
2012
IEEE
Soft error reliability has become a first-order design criterion for modern microprocessors. Architectural Vulnerability Factor (AVF) modeling is often used to capture the probab...
ITC
2003
IEEE
15 years 5 months ago
2003
IEEE
The objective of this paper is to present an infrastructure IP (I-IP) designed to characterize yield loss in the process back-end. The I-IP structure is described in using a botto...
108
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FPL
2004
Springer
15 years 5 months ago
2004
Springer
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
SAT
2005
Springer
15 years 5 months ago
2005
Springer
Abstract. We present a new generic problem solving approach for overconstrained problems based on Max-SAT. We first define a clausal form formalism that deals with blocks of clau...
107
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ICCAD
1997
IEEE
15 years 3 months ago
1997
IEEE
Traditional synthesis techniques optimize CMOS circuits in two phases i) logic minimization and ii) library mapping phase. Typically, the structures and the sizes of the gates in ...