339 search results - page 52 / 68 » Hardware Synthesis for Multi-Dimensional Time |
116
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FPL
2009
Springer
15 years 4 months ago
2009
Springer
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a software-like...
107
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ASPDAC
2009
ACM
15 years 1 months ago
2009
ACM
Performance evaluation is a serious challenge in designing or optimizing reconfigurable instruction set processors. The conventional approaches based on synthesis and simulations a...
DATE
2007
IEEE
15 years 6 months ago
2007
IEEE
Design closure becomes hard to achieve at physical layout stage due to the emergence of long global interconnects. Consequently, interconnect planning needs to be integrated in hi...
139
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CODES
2003
IEEE
15 years 5 months ago
2003
IEEE
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
128
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CODES
2006
IEEE
15 years 6 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...