Sciweavers

213 search results - page 11 / 43
» Hardware Transactional Memory with Operating System Support,...
Sort
View
71
Voted
ASPLOS
2010
ACM
15 years 4 months ago
Dynamic filtering: multi-purpose architecture support for language runtime systems
This paper introduces a new abstraction to accelerate the readbarriers and write-barriers used by language runtime systems. We exploit the fact that, dynamically, many barrier exe...
Tim Harris, Sasa Tomic, Adrián Cristal, Osm...
ISCA
2012
IEEE
274views Hardware» more  ISCA 2012»
12 years 12 months ago
The dynamic granularity memory system
Chip multiprocessors enable continued performance scaling with increasingly many cores per chip. As the throughput of computation outpaces available memory bandwidth, however, the...
Doe Hyun Yoon, Min Kyu Jeong, Michael Sullivan, Ma...
IEEEPACT
2006
IEEE
15 years 3 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
IEEEPACT
2007
IEEE
15 years 3 months ago
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
IPPS
1996
IEEE
15 years 1 months ago
Software Support for Virtual Memory-Mapped Communication
Virtual memory-mapped communication (VMMC) is a communication model providing direct data transfer between the sender's and receiver's virtual address spaces. This model...
Cezary Dubnicki, Liviu Iftode, Edward W. Felten, K...