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» Hardware code generation from dataflow programs
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SP
2008
IEEE
15 years 8 months ago
Preventing Memory Error Exploits with WIT
Attacks often exploit memory errors to gain control over the execution of vulnerable programs. These attacks remain a serious problem despite previous research on techniques to pr...
Periklis Akritidis, Cristian Cadar, Costin Raiciu,...
LCTRTS
2009
Springer
15 years 8 months ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava
MICRO
2006
IEEE
117views Hardware» more  MICRO 2006»
15 years 7 months ago
PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection
Dynamic software bug detection tools are commonly used because they leverage run-time information. However, they suffer from a fundamental limitation, the Path Coverage Problem: t...
Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou, Josep T...
DAGSTUHL
2006
15 years 3 months ago
Model Transformation Technologies in the Context of Modelling Software Systems
Programming technologies have improved continuously during the last decades, but from an Information Systems perspective, some well-known problems associated to the design and impl...
Oscar Pastor
ISCA
2012
IEEE
208views Hardware» more  ISCA 2012»
13 years 4 months ago
Harmony: Collection and analysis of parallel block vectors
Efficient execution of well-parallelized applications is central to performance in the multicore era. Program analysis tools support the hardware and software sides of this effor...
Melanie Kambadur, Kui Tang, Martha A. Kim