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» Hardware design experiences in ZebraNet
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FPGA
2005
ACM
97views FPGA» more  FPGA 2005»
15 years 3 months ago
Techniques for synthesizing binaries to an advanced register/memory structure
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid
CACM
2008
84views more  CACM 2008»
14 years 10 months ago
The emergence of a networking primitive in wireless sensor networks
The wireless sensor network community approached netabstractions as an open question, allowing answers to emerge with time and experience. The Trickle algorithm has become a basic...
Philip Levis, Eric A. Brewer, David E. Culler, Dav...
TROB
2008
107views more  TROB 2008»
14 years 9 months ago
Templates and Anchors for Antenna-Based Wall Following in Cockroaches and Robots
The interplay between robotics and neuromechanics facilitates discoveries in both fields: nature provides roboticists with design ideas, while robotics research elucidates critical...
J. Lee, S. N. Sponberg, Owen Y. Loh, Andrew G. Lam...
HIPEAC
2007
Springer
15 years 3 months ago
Compiler-Assisted Memory Encryption for Embedded Processors
A critical component in the design of secure processors is memory encryption which provides protection for the privacy of code and data stored in off-chip memory. The overhead of ...
Vijay Nagarajan, Rajiv Gupta, Arvind Krishnaswamy
DATE
2010
IEEE
154views Hardware» more  DATE 2010»
15 years 2 months ago
ERSA: Error Resilient System Architecture for probabilistic applications
There is a growing concern about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for...
Larkhoon Leem, Hyungmin Cho, Jason Bau, Quinn A. J...