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» Hardware efficient architectures for Eigenvalue computation
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ARC
2012
Springer
317views Hardware» more  ARC 2012»
13 years 5 months ago
A High Throughput FPGA-Based Implementation of the Lanczos Method for the Symmetric Extremal Eigenvalue Problem
Iterative numerical algorithms with high memory bandwidth requirements but medium-size data sets (matrix size ∼ a few 100s) are highly appropriate for FPGA acceleration. This pap...
Abid Rafique, Nachiket Kapre, George A. Constantin...
ACIVS
2008
Springer
14 years 11 months ago
An Efficient Hardware Architecture without Line Memories for Morphological Image Processing
In this paper, we present a novel hardware architecture to achieve erosion and dilation with a large structuring element. We are proposing a modification of HGW algorithm with a bl...
Christophe Clienti, Michel Bilodeau, Serge Beucher