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» Hierarchical interfaces for hardware software systems
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ASPDAC
2008
ACM
164views Hardware» more  ASPDAC 2008»
15 years 3 months ago
The Shining embedded system design methodology based on self dynamic reconfigurable architectures
Complex design, targeting System-on-Chip based on reconfigurable architectures, still lacks a generalized methodology allowing both the automatic derivation of a complete system s...
Carlo Curino, Luca Fossati, Vincenzo Rana, Frances...
FPGA
2011
ACM
401views FPGA» more  FPGA 2011»
14 years 5 months ago
LegUp: high-level synthesis for FPGA-based processor/accelerator systems
In this paper, we introduce a new open source high-level synthesis tool called LegUp that allows software techniques to be used for hardware design. LegUp accepts a standard C pro...
Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zh...
HPCA
1998
IEEE
15 years 6 months ago
Address Translation Mechanisms In Network Interfaces
Good network hardware performance is often squandered by overheads for accessing the network interface (NI) within a host. NIs that support user-level messaging avoid frequent ope...
Ioannis Schoinas, Mark D. Hill
AVSS
2006
IEEE
15 years 8 months ago
Open Source Vision Library (OpenVL) Based Local Positioning System
This paper presents an Open Source Vision Library (OpenVL) for hardware acceleration of video-based surveillance systems and other computer vision applications to facilitate low l...
Changsong Shen, Steve Oldridge, Sidney Fels
119
Voted
ARC
2010
Springer
183views Hardware» more  ARC 2010»
15 years 2 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards