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IPPS
2007
IEEE
15 years 9 months ago
A Portable Framework for High-Speed Parallel Producer/Consumers on Real CMP, SMT and SMP Architectures
This paper explores generating efficient, portable HighSpeed Producer Consumer (HSPC) code on current shared memory architectures: Chip Multi-Processors (CMP), Simultaneous Multi...
Richard T. Saunders, Clinton L. Jeffery, Derek T. ...
LCTRTS
2004
Springer
15 years 8 months ago
A trace-based binary compilation framework for energy-aware computing
Energy-aware compilers are becoming increasingly important for embedded systems due to the need to meet conflicting constraints on time, code size and power consumption. We intro...
Lian Li 0002, Jingling Xue
FPGA
1997
ACM
160views FPGA» more  FPGA 1997»
15 years 7 months ago
Architecture Issues and Solutions for a High-Capacity FPGA
ct High-capacity FPGAs pose device architects with a variety of problems. The most obvious of these problems is interconnect capacity. Others include interconnect performance, cloc...
Steven Trimberger, Khue Duong, Bob Conn
ANCS
2009
ACM
15 years 1 months ago
EINIC: an architecture for high bandwidth network I/O on multi-core processors
This paper proposes a new server architecture EINIC (Enhanced Integrated NIC) for multi-core processors to tackle the mismatch between network speed and host computational capacit...
Guangdeng Liao, Laxmi N. Bhuyan, Danhua Guo, Steve...
ECIS
2001
15 years 4 months ago
Building an Enterprise Architecture for Public Administration: A High Level Data Model for Strategic Planning
This paper describes the construction of a generic data model for strategic planning in Public Administration (PA). This model is presented at two distinct levels corresponding to...
Konstantinos A. Tarabanis, Vassilios Peristeras, G...