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124
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FPL
2004
Springer
141views Hardware» more  FPL 2004»
15 years 9 months ago
Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
Zachary K. Baker, Viktor K. Prasanna
153
Voted
CODES
2009
IEEE
15 years 7 months ago
TotalProf: a fast and accurate retargetable source code profiler
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
Lei Gao, Jia Huang, Jianjiang Ceng, Rainer Leupers...
128
Voted
IPPS
2007
IEEE
15 years 10 months ago
Experimental Evaluation of Emerging Multi-core Architectures
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s law is facing practical challenges. As a result, the multi-core processor arch...
Abdullah Kayi, Yiyi Yao, Tarek A. El-Ghazawi, Greg...
126
Voted
ISCAS
2007
IEEE
128views Hardware» more  ISCAS 2007»
15 years 10 months ago
Collaborative Routing Architecture for FPGA
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efficiency in hardware and competitive delay p...
Yaling Ma, Mingjie Lin
LADS
2009
Springer
15 years 8 months ago
The ARTS Real-Time Agent Architecture
Abstract—We present a new approach to providing soft realtime guarantees for Belief-Desire-Intention (BDI) agents. We define what it means for BDI agents to operate in real time...
Konstantin Vikhorev, Natasha Alechina, Brian Logan