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162
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TC
2008
15 years 3 months ago
Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis
On-chip interconnection networks (OCINs) have emerged as a modular and scalable solution for wire delay constraints in deep submicron VLSI design. OCIN research has shown that the ...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
143
Voted
RAS
2010
164views more  RAS 2010»
15 years 2 months ago
Towards performing everyday manipulation activities
This article investigates fundamental issues in scaling autonomous personal robots towards open-ended sets of everyday manipulation tasks which involve high complexity and vague j...
Michael Beetz, Dominik Jain, Lorenz Mösenlech...
140
Voted
IPPS
2010
IEEE
15 years 1 months ago
Improving the performance of Uintah: A large-scale adaptive meshing computational framework
Abstract--Uintah is a highly parallel and adaptive multiphysics framework created by the Center for Simulation of Accidental Fires and Explosions in Utah. Uintah, which is built up...
Justin Luitjens, Martin Berzins
139
Voted
AINA
2009
IEEE
15 years 1 months ago
Evaluating the Performance of Network Protocol Processing on Multi-core Systems
Improvements at the physical network layer have enabled technologies such as 10 Gigabit Ethernet. Single core end-systems are unable to fully utilise these networks, due to limite...
Matthew Faulkner, Andrew Brampton, Stephen Pink
190
Voted
ISCA
2012
IEEE
262views Hardware» more  ISCA 2012»
13 years 6 months ago
Boosting mobile GPU performance with a decoupled access/execute fragment processor
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
Jose-Maria Arnau, Joan-Manuel Parcerisa, Polychron...