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ACSAC
2005
IEEE
15 years 9 months ago
Building a MAC-Based Security Architecture for the Xen Open-Source Hypervisor
We present the sHype hypervisor security architecture and examine in detail its mandatory access control facilities. While existing hypervisor security approaches aiming at high a...
Reiner Sailer, Trent Jaeger, Enriquillo Valdez, Ra...
ACSC
2003
IEEE
15 years 9 months ago
FITS - A Fault Injection Architecture for Time-Triggered Systems
Time-triggered systems require a very high degree of temporal accuracy at critical stages during run time. While many software fault injection environments exist today, none of th...
René Hexel
ICASSP
2010
IEEE
15 years 1 months ago
Bandwidth-intensive FPGA architecture for multi-dimensional DFT
Multi-dimensional (MD) Discrete Fourier Transform (DFT) is a key kernel algorithm in many signal processing algorithms, including radar data processing and medical imaging. Althou...
Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vija...
ICC
2007
IEEE
208views Communications» more  ICC 2007»
15 years 10 months ago
A Low Complexity Image Quality Metric for Real-Time Open-Loop Transcoding Architectures
—In this paper, we present an original image quality metric for open-loop transcoding architectures based on frequency selective transmission. The proposed metric computes the no...
Charlène Goudemand, Marc Gazalet, Fran&cced...
ICPADS
2006
IEEE
15 years 10 months ago
Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture
The widening gap between processor and memory performance is the main bottleneck for modern computer systems to achieve high processor utilization. In this paper, we propose a new...
Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edw...