2852 search results - page 308 / 571 » High Performance Architectures and Compilers |
159
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HIPEAC
2010
Springer
15 years 6 months ago
2010
Springer
This paper presents a program generator for fast software Viterbi decoders for arbitrary convolutional codes. The input to the generator is a specification of the code and a single...
137
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DAC
1999
ACM
15 years 8 months ago
1999
ACM
High performance circuit techniques such as domino logic have migrated from the microprocessor world into more mainstream ASIC designs. The problem is that domino logic comes at a...
133
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CASES
2004
ACM
15 years 9 months ago
2004
ACM
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
135
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FPL
2009
Springer
15 years 9 months ago
2009
Springer
The creation and optimization of FPGA accelerators comprising several compute cores and memories are challenging tasks in high performance reconfigurable computing. In this paper...
150
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CODES
2007
IEEE
15 years 10 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...