2852 search results - page 40 / 571 » High Performance Architectures and Compilers |
IPPS
2009
IEEE
15 years 4 months ago
2009
IEEE
In many scientific applications, significant time is spent tuning codes for a particular highperformance architecture. Tuning approaches range from the relatively nonintrusive (...
IPPS
2007
IEEE
15 years 4 months ago
2007
IEEE
Compiler technology for multimedia extensions must effectively utilize not only the SIMD compute engines but also the various levels of the memory hierarchy: superword registers,...
WCRE
2002
IEEE
15 years 2 months ago
2002
IEEE
Dynamic binary translators compile machine code from a source architecture to a target architecture at run time. Due to the hard time constraints of just-in-time compilation only ...
SAMOS
2004
Springer
15 years 3 months ago
2004
Springer
Today’s Application Specific Instruction-set Processor (ASIP) design methodology often employs centralized Architecture Description Language (ADL) processor models, from which s...
CHES
2000
Springer
15 years 2 months ago
2000
Springer
This work proposes a processor architecture for elliptic curves cryptosystems over fields GF(2m ). This is a scalable architecture in terms of area and speed that exploits the abil...