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» High Performance Architectures and Compilers
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HCW
2000
IEEE
15 years 2 months ago
Heterogeneity as Key Feature of High Performance Computing: the PQE1 Prototype
In this work we present the results of a project aimed at assembling an hybrid massively parallel machine, the PQE1 prototype, devoted to the simulation of complex physical models...
Paolo Palazzari, Lidia Arcipiani, Massimo Celino, ...
FPGA
1997
ACM
149views FPGA» more  FPGA 1997»
15 years 2 months ago
Signal Processing at 250 MHz Using High-Performance FPGA's
This paper describes an application in high-performance signal processing using reconfigurable computing engines: a 250 MHz cross-correlator for radio astronomy. Experimental resu...
Brian Von Herzen
ERLANG
2003
ACM
15 years 3 months ago
All you wanted to know about the HiPE compiler: (but might have been afraid to ask)
We present a user-oriented description of features and characteristics of the High Performance Erlang (HiPE) native code compiler, which nowadays is part of Erlang/OTP. In particu...
Konstantinos F. Sagonas, Mikael Pettersson, Richar...
EMSOFT
2005
Springer
15 years 3 months ago
High performance annotation-aware JVM for Java cards
Early applications of smart cards have focused in the area of personal security. Recently, there has been an increasing demand for networked, multi-application cards. In this new ...
Ana Azevedo, Arun Kejariwal, Alexander V. Veidenba...
ICCD
2007
IEEE
132views Hardware» more  ICCD 2007»
15 years 7 months ago
Post-layout comparison of high performance 64b static adders in energy-delay space
Our objective was to determine the most energy efficient 64b static CMOS adder architecture, for a range of high-performance delay targets. We examine extensively carry-lookahead ...
Sheng Sun, Carl Sechen