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CSREAESA
2006
15 years 1 months ago
A Dual-core Embedded System-on-Chip Architecture for Multimedia Signal Processing Applications
- This paper presents a dual-core embedded System-on-Chip for a wide range of application fields with particularly high processing demands, including general signal processing, vid...
Hong Yue, Kui Dai, Zhiying Wang
RTAS
2008
IEEE
15 years 6 months ago
A Hybrid DVS Scheme for Interactive 3D Games
Interactive 3D games are now widely available on a variety of mobile devices for which battery-life is a major concern. Many of these devices support voltage/frequencyscalable pro...
Yan Gu, Samarjit Chakraborty
TREC
2007
15 years 25 days ago
Exegy at TREC 2007 Million Query Track
Exegy’s submission for the TREC 2007 million query track consisted of results obtained by running the queries against the raw data, i.e., the data was not indexed. The hardwarea...
Naveen Singla, Ronald S. Indeck
CSE
2009
IEEE
15 years 6 months ago
Prospector: Multiscale Energy Measurement of Networked Embedded Systems with Wideband Power Signals
Abstract—Today’s wirelessly networked embedded systems underlie a vast array of electronic devices, performing computation, communication, and input/output. A major design goal...
Kenji R. Yamamoto, Paul G. Flikkema
VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
16 years 8 days ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...