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DAC
1996
ACM
15 years 1 months ago
Optimal Clock Skew Scheduling Tolerant to Process Variations
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
José Luis Neves, Eby G. Friedman
MASS
2010
161views Communications» more  MASS 2010»
14 years 4 months ago
Mode switch - Adaptive use of delay-sensitive or energy-aware communication in IEEE 802.15.4-based networks
Abstract--We propose "mode switch", an adaptive loadsensitive solution that supports both an energy-efficient operation mode for transmitting normal sensor data and an Qo...
Feng Chen, Xiaoyu Tong, Edith Ngar, Falko Dressler
SIGIR
2012
ACM
12 years 12 months ago
Top-k learning to rank: labeling, ranking and evaluation
In this paper, we propose a novel top-k learning to rank framework, which involves labeling strategy, ranking model and evaluation measure. The motivation comes from the difficul...
Shuzi Niu, Jiafeng Guo, Yanyan Lan, Xueqi Cheng
SIGMOD
2005
ACM
143views Database» more  SIGMOD 2005»
15 years 9 months ago
Holistic Aggregates in a Networked World: Distributed Tracking of Approximate Quantiles
While traditional database systems optimize for performance on one-shot queries, emerging large-scale monitoring applications require continuous tracking of complex aggregates and...
Graham Cormode, Minos N. Garofalakis, S. Muthukris...
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
15 years 6 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...