619 search results - page 11 / 124 » High Performance Integrated Network Communications Architect... |
IPPS
2007
IEEE
15 years 3 months ago
2007
IEEE
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
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Voted
JSA
2010
14 years 4 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
IPPS
2007
IEEE
15 years 3 months ago
2007
IEEE
In this paper we present a cost-effective, high bandwidth server I/O network architecture, named PaScal (Parallel and Scalable). We use the PaScal server I/O network to support da...
SAINT
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper presents a middleware architecture for the adaptable management of heterogeneous wireless resources. The main application of the proposed architecture is the optimal ut...
INFOCOM
1999
IEEE
15 years 1 months ago
1999
IEEE
Wire-speed IP (Internet Protocol) routers require very fast routing table lookup for incoming IP packets. The routing table lookup operation is time consuming because the part of ...