Sciweavers

6138 search results - page 249 / 1228
» High performance computing through parallel processing
Sort
View
EUROPAR
2008
Springer
15 years 5 months ago
Performance Implications of Cache Affinity on Multicore Processors
Cache affinity between a process and a processor is observed when the processor cache has accumulated some amount of the process state, i.e., data or instructions. Cache affinity i...
Vahid Kazempour, Alexandra Fedorova, Pouya Alagheb...
ICPP
1999
IEEE
15 years 8 months ago
Performance Study of Token-Passing Protocol for Traffic Multiplicity in Optical Networks
This paper extended a mathematical technique to model the behaviour of token-passing protocol in a star-coupled wavelength-division multiplexing (WDM) optical network for traffic ...
S. Selvakennedy, Ashwani K. Ramani
ICDCS
1998
IEEE
15 years 8 months ago
Optimal Channel Allocation for Data Dissemination in Mobile Computing Environments
This paper discusses wireless channel allocation problem for data dissemination in mobile computing systems. Methods for accessing data through broadcast and on-demand channels ar...
Qinglong Hu, Dik Lun Lee, Wang-Chien Lee
HPDC
1998
IEEE
15 years 8 months ago
Application Experiences with the Globus Toolkit
The development of applications and tools for highperformance "computational grids" is complicated by the heterogeneity and frequently dynamic behavior of the underlying...
Sharon Brunett, Karl Czajkowski, Steven Fitzgerald...
ISCAS
2007
IEEE
84views Hardware» more  ISCAS 2007»
15 years 10 months ago
High Speed 1-bit Bypass Adder Design for Low Precision Additions
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
Jong-Suk Lee, Dong Sam Ha