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IEEEPACT
2009
IEEE
16 years 1 months ago
CPROB: Checkpoint Processing with Opportunistic Minimal Recovery
—CPR (Checkpoint Processing and Recovery) is a physical register management scheme that supports a larger instruction window and higher average IPC than conventional ROB-style re...
Andrew D. Hilton, Neeraj Eswaran, Amir Roth
CAINE
2003
15 years 8 months ago
An Issue Logic for Superscalar Microprocessors
In order to enhance the computer performance, nowadays microprocessors use Superscalar architecture. But the Superscalar architecture is unable to enhance the performance effectiv...
Feng-Jiann Shiao, Jong-Jiann Shieh
ERSA
2008
145views Hardware» more  ERSA 2008»
15 years 8 months ago
Multicore Devices: A New Generation of Reconfigurable Architectures
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
Steven A. Guccione
202
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HPCA
2009
IEEE
16 years 7 months ago
Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
Niti Madan, Li Zhao, Naveen Muralimanohar, Anirudd...
TOG
2008
106views more  TOG 2008»
15 years 7 months ago
BSGP: bulk-synchronous GPU programming
We present BSGP, a new programming language for general purpose computation on the GPU. A BSGP program looks much the same as a sequential C program. Programmers only need to supp...
Qiming Hou, Kun Zhou, Baining Guo