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MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
15 years 7 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
DSN
2005
IEEE
15 years 8 months ago
Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, ...
IPPS
1998
IEEE
15 years 6 months ago
Design, Implementation and Evaluation of Parallel Pipelined STAP on Parallel Computers
This paper presents performance results for the design and implementation of parallel pipelined Space-Time Adaptive Processing (STAP) algorithms on parallel computers. In particul...
Alok N. Choudhary, Wei-keng Liao, Donald Weiner, P...
IPPS
1997
IEEE
15 years 6 months ago
An Accurate Model for the Performance Analysis of Deterministic Wormhole Routing
We present a new analytical approach for the performance evaluation of asynchronous wormhole routing in k-ary n-cubes. Through the analysis of network flows, our methodology furni...
Bruno Ciciani, Claudio Paolucci, Michele Colajanni
IPPS
2007
IEEE
15 years 8 months ago
Automatic Trace-Based Performance Analysis of Metacomputing Applications
The processing power and memory capacity of independent and heterogeneous parallel machines can be combined to form a single parallel system that is more powerful than any of its ...
Daniel Becker, Felix Wolf, Wolfgang Frings, Markus...