181 search results - page 12 / 37 » High-level area and power estimation for VLSI circuits |
VLSID
2002
IEEE
15 years 2 months ago
2002
IEEE
Power supply noise is a strong function of the switching activities of the circuit modules. Peak power supply noise can be significantly reduced by judiciously arranging the modu...
DFT
2006
IEEE
15 years 1 months ago
2006
IEEE
The concept of clocking for QCA, referred to as the four-phase clocking, is widely used. However, inherited characteristics of QCA, such as the way to hold state, the way to synch...
ISLPED
2003
ACM
15 years 2 months ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
VLSID
2007
IEEE
15 years 10 months ago
2007
IEEE
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
DATE
2010
IEEE
15 years 2 months ago
2010
IEEE
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...