537 search results - page 60 / 108 » High-precision interconnect analysis |
103
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DDECS
2007
IEEE
15 years 8 months ago
2007
IEEE
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
105
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ICC
2007
IEEE
15 years 8 months ago
2007
IEEE
—The use of adaptively-routed wormhole switched k-ary n-cubes has been motivated by the high path diversity provided by the rich topology of this family of interconnection networ...
SIES
2007
IEEE
15 years 8 months ago
2007
IEEE
In our previous work [1], Full Duplex Switched Ethernet was put forward as an attractive candidate to replace the MIL-STD 1553B data bus, in next generation "1553B"embedd...
123
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ASAP
2005
IEEE
15 years 7 months ago
2005
IEEE
Users expect future handhelddevices to provide extended multimedia functionality and have long battery life. This type of application imposes heavy constraints on performance and ...
110
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ASPDAC
2004
ACM
15 years 7 months ago
2004
ACM
As gate delays decrease faster than wire delays for each technology generation, buffer insertion becomes a popular method to reduce the interconnect delay. Several modern buffer in...