This paper describes an analytical model that relates the architectural parameters of an FPGA to the average prerouting wirelength of an FPGA implementation. Both homogeneous and ...
Alastair M. Smith, Steven J. E. Wilton, Joydip Das
Traditional sensor network deployments consisted of fixed infrastructures and were relatively small in size. More and more, we see the deployment of ad-hoc sensor networks with h...
Martin F. O'Connor, Vincent Andrieu, Mark Roantree
This paper presents a new learning approach for pattern classification applications involving imbalanced data sets. In this approach, a clustering technique is employed to resamp...
Giang Hoang Nguyen, Abdesselam Bouzerdoum, Son Lam...
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
Abstract. HeteroMPI is an extension of MPI designed for high performance computing on heterogeneous networks of computers. The recent new feature of HeteroMPI is the optimized vers...
Alexey L. Lastovetsky, Maureen O'Flynn, Vladimir R...