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DSD
2006
IEEE
107views Hardware» more  DSD 2006»
15 years 6 months ago
A High Level Power Model for the Nostrum NoC
We propose a power model for the Nostrum NoC. For this purpose an empirical power model of links and switches has been formulated and validated with the Synopsys Power Compiler. T...
Sandro Penolazzi, Axel Jantsch
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
15 years 5 months ago
A 52mW 1200MIPS compact DSP for multi-core media SoC
- This paper presents a DSP core for multi-core media SoC, which is optimized to execute a set of signal processing tasks very efficiently. The fully-programmable core has a data-c...
Shih-Hao Ou, Tay-Jyi Lin, Chao-Wei Huang, Yu-Ting ...
VMCAI
2005
Springer
15 years 5 months ago
Cryptographic Protocol Analysis on Real C Code
Abstract. Implementations of cryptographic protocols, such as OpenSSL for example, contain bugs affecting security, which cannot be detected by just analyzing abstract protocols (e...
Jean Goubault-Larrecq, Fabrice Parrennes
ICSM
2003
IEEE
15 years 5 months ago
Mining Design Patterns from C++ Source Code
Design patterns are micro architectures that have proved to be reliable, easy-to implement and robust. There is a need in science and industry for recognizing these patterns. We p...
Zsolt Balanyi, Rudolf Ferenc
IPPS
2003
IEEE
15 years 5 months ago
System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC
To cope with the increasing demand for higher computational power and flexibility, dynamically reconfigurable blocks become an important part inside a system-on-chip. Several meth...
Antti Pelkonen, Kostas Masselos, Miroslav Cup&aacu...