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ETS
2007
IEEE
109views Hardware» more  ETS 2007»
15 years 4 months ago
Test Configurations for Diagnosing Faulty Links in NoC Switches
The paper proposes a new concept of diagnosing faulty links in Network-on-a-Chip (NoC) designs. The method is based on functional fault models and it implements packet address dri...
Jaan Raik, Raimund Ubar, Vineeth Govind
FDL
2007
IEEE
15 years 4 months ago
An Integrated SystemC Debugging Environment
Since its first release the system level language SystemC had a significant impact on various areas in VLSI-CAD. One remarkable benefit of SystemC lies in the of abstraction le...
Frank Rogin, Christian Genz, Rolf Drechsler, Steff...
IPPS
2007
IEEE
15 years 4 months ago
A General Purpose Partially Reconfigurable Processor Simulator (PReProS)
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...
Alisson Vasconcelos De Brito, Matthias Kühnle...
MICRO
2007
IEEE
94views Hardware» more  MICRO 2007»
15 years 4 months ago
Argus: Low-Cost, Comprehensive Error Detection in Simple Cores
We have developed Argus, a novel approach for providing low-cost, comprehensive error detection for simple cores. The key to Argus is that the operation of a von Neumann core cons...
Albert Meixner, Michael E. Bauer, Daniel J. Sorin
VLSID
2007
IEEE
104views VLSI» more  VLSID 2007»
15 years 4 months ago
STEFAL: A System Level Temperature- and Floorplan-Aware Leakage Power Estimator for SoCs
In this paper we demonstrate the impact of the floorplan on the temperature-dependent leakage power of a System on Chip (SoC). We propose a novel system level temperature aware a...
Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal...