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» Implementing a STARI chip
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TVLSI
1998
88views more  TVLSI 1998»
14 years 9 months ago
Time multiplexed color image processing based on a CNN with cell-state outputs
—A practical system approach for time-multiplexing cellular neural network (CNN) implementations suitable for processing large and complex images using small CNN arrays is presen...
Lei Wang, José Pineda de Gyvez, Edgar S&aac...
BMCBI
2005
82views more  BMCBI 2005»
14 years 9 months ago
Quality assessment of microarrays: Visualization of spatial artifacts and quantitation of regional biases
Background: Quality-control is an important issue in the analysis of gene expression microarrays. One type of problem is regional bias, in which one region of a chip shows artifac...
Mark Reimers, John N. Weinstein
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
15 years 4 months ago
A set-based mapping strategy for flash-memory reliability enhancement
—With wide applicability of flash memory in various application domains, reliability has become a very critical issue. This research is motivated by the needs to resolve the lif...
Yuan-Sheng Chu, Jen-Wei Hsieh, Yuan-Hao Chang, Tei...
WMPI
2004
ACM
15 years 3 months ago
A low cost, multithreaded processing-in-memory system
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. ...
DAC
1996
ACM
15 years 1 months ago
FADIC: Architectural Synthesis applied in IC Design
This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...
J. Huisken, F. Welten