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» Implementing a STARI chip
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DATE
2010
IEEE
118views Hardware» more  DATE 2010»
14 years 8 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung
SBCCI
2006
ACM
139views VLSI» more  SBCCI 2006»
15 years 3 months ago
Infrastructure for dynamic reconfigurable systems: choices and trade-offs
Platform-based design is a method to implement complex SoCs, avoiding chip design from scratch. A promising evolution of platform-based design are MPSoC. Such generic architecture...
Leandro Möller, Rafael Soares, Ewerson Carval...
ESWS
2010
Springer
15 years 2 months ago
Finding Your Way through the Rijksmuseum with an Adaptive Mobile Museum Guide
Abstract. This paper describes a real-time routing system that implements a mobile museum tour guide for providing personalized tours tailored to the user position inside the museu...
Willem Robert van Hage, Natalia Stash, Yiwen Wang,...
BMCBI
2006
160views more  BMCBI 2006»
14 years 10 months ago
MIMAS: an innovative tool for network-based high density oligonucleotide microarray data management and annotation
Background: The high-density oligonucleotide microarray (GeneChip) is an important tool for molecular biological research aiming at large-scale detection of small nucleotide polym...
Leandro Hermida, Olivier Schaad, Philippe Demougin...
CODES
2007
IEEE
15 years 4 months ago
Performance and resource optimization of NoC router architecture for master and slave IP cores
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
Glenn Leary, Krishna Mehta, Karam S. Chatha