Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...
Sharing selected data structures among virtual machines of a safe language can improve resource utilization of each participating run-time system. The challenge is to determine wh...
Bernard Wong, Grzegorz Czajkowski, Laurent Dayn&eg...
— In state of the art hardware-software-co-design flows for FPGA based systems, the hardware-software partitioning problem is solved offline, thus, omitting the great flexibil...
Dirk Koch, Christian Haubelt, Thilo Streichert, J&...
The central idea behind interface-based design is to describe components by a component interface. In contrast to a component description that describes what a component does, a c...
Over the last few years, more and more heuristic decision making techniques have been inspired by nature, e.g. evolutionary algorithms, ant colony optimisation and simulated annea...