70 search results - page 8 / 14 » Improved Pseudorandom Generators for Depth 2 Circuits |
ISQED
2002
IEEE
15 years 2 months ago
2002
IEEE
The design methods and the automation of the comparator circuit layout generation for a flash A/D converter are presented in this paper. The threshold inverter quantization (TIQ)...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
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ISPD
2012
ACM
13 years 5 months ago
2012
ACM
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
DAC
1996
ACM
15 years 1 months ago
1996
ACM
Accurate power estimation is essential for low power digital CMOS circuit design. Power dissipation is input pattern dependent. To obtain an accurate power estimate, a large input...
DATE
2007
IEEE
15 years 3 months ago
2007
IEEE
This paper presents a built-in self-test (BiST) scheme for analog to digital converters (ADC) based on a linear ramp generator and efficient output analysis. The proposed analysi...