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CORR
2012
Springer
229views Education» more  CORR 2012»
13 years 5 months ago
Resource Allocation with Subcarrier Pairing in OFDMA Two-Way Relay Networks
Abstract—This study considers an orthogonal frequencydivision multiple-access (OFDMA)-based multi-user two-way relay network where multiple mobile stations (MSs) communicate with...
Hao Zhang, Yuan Liu, Meixia Tao
ICCAD
2007
IEEE
87views Hardware» more  ICCAD 2007»
15 years 6 months ago
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
Philip Brisk, Ajay K. Verma, Paolo Ienne
CODES
2005
IEEE
14 years 11 months ago
Automated data cache placement for embedded VLIW ASIPs
Memory bandwidth issues present a formidable bottleneck to accelerating embedded applications, particularly data bandwidth for multiple-issue VLIW processors. Providing an efficie...
Paul Morgan, Richard Taylor, Japheth Hossell, Geor...
SIAMCOMP
1998
117views more  SIAMCOMP 1998»
14 years 9 months ago
The Queue-Read Queue-Write PRAM Model: Accounting for Contention in Parallel Algorithms
This paper introduces the queue-read, queue-write (qrqw) parallel random access machine (pram) model, which permits concurrent reading and writing to shared memory locations, but ...
Phillip B. Gibbons, Yossi Matias, Vijaya Ramachand...
EMSOFT
2007
Springer
15 years 4 months ago
Buffer optimization and dispatching scheme for embedded systems with behavioral transparency
Software components are modular and can enable post-deployment update, but their high overhead in runtime and memory is prohibitive for many embedded systems. This paper proposes ...
Jiwon Hahn, Pai H. Chou