Sciweavers

2032 search results - page 26 / 407
» Improving Java performance using hardware translation
Sort
View
MICRO
2003
IEEE
142views Hardware» more  MICRO 2003»
15 years 2 months ago
Hardware Support for Control Transfers in Code Caches
Many dynamic optimization and/or binary translation systems hold optimized/translated superblocks in a code cache. Conventional code caching systems suffer from overheads when con...
Ho-Seop Kim, James E. Smith
ISCAS
2006
IEEE
119views Hardware» more  ISCAS 2006»
15 years 3 months ago
Performance improvement of the H.264/AVC deblocking filter using SIMD instructions
The H.264/AVC standard defines an in-loop de- instructions, available in current multimedia SIMD instruction blocking filter which is used in both the encoder and decoder. This set...
Stephen Warrington, Hassan Shojania, Subramania Su...
HPCA
1999
IEEE
15 years 1 months ago
Improving CC-NUMA Performance Using Instruction-Based Prediction
We propose Instruction-based Prediction as a means to optimize directory-based cache coherent NUMA shared-memory. Instruction-based prediction is based on observing the behavior o...
Stefanos Kaxiras, James R. Goodman
MOBISYS
2006
ACM
15 years 9 months ago
Using smart triggers for improved user performance in 802.11 wireless networks
The handoff algorithms in the current generation of 802.11 networks are primarily reactive in nature, because they wait until the link quality degrades substantially to trigger a ...
Vivek Mhatre, Konstantina Papagiannaki
95
Voted
PCM
2004
Springer
106views Multimedia» more  PCM 2004»
15 years 2 months ago
Performance Improvement of Vector Quantization by Using Threshold
Abstract. Vector quantization (VQ) is an elementary technique for image compression. However, the complexity of searching the nearest codeword in a codebook is time-consuming. In t...
Hung-Yi Chang, Pi-Chung Wang, Rong-Chang Chen, Shu...