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» Improving Java performance using hardware translation
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CAINE
2006
14 years 11 months ago
A multiobjective evolutionary approach for constrained joint source code optimization
The synergy of software and hardware leads to efficient application expression profile (AEP) not only in terms of execution time and energy but also optimal architecture usage. We...
Naeem Zafar Azeemi
ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
15 years 3 months ago
A novel dimensionally-decomposed router for on-chip communication in 3D architectures
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...
Jongman Kim, Chrysostomos Nicopoulos, Dongkook Par...
76
Voted
LCTRTS
2004
Springer
15 years 2 months ago
Asynchronous software thread integration for efficient software
Existing software thread integration (STI) methods provide synchronous thread progress within integrated functions. For the remaining, non-integrated portions of the secondary (or...
Nagendra J. Kumar, Siddhartha Shivshankar, Alexand...
99
Voted
DIAL
2004
IEEE
164views Image Analysis» more  DIAL 2004»
15 years 1 months ago
A Dynamic Feature Generation System for Automated Metadata Extraction in Preservation of Digital Materials
Obsolescence in storage media and the hardware and software for access and use can render old electronic files inaccessible and unusable. Therefore, the long-term preservation of ...
Song Mao, Jongwoo Kim, George R. Thoma
ASPLOS
1998
ACM
15 years 1 months ago
Compiler-Controlled Memory
Optimizations aimed at reducing the impact of memory operations on execution speed have long concentrated on improving cache performance. These efforts achieve a reasonable level...
Keith D. Cooper, Timothy J. Harvey