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» Improving Memory Energy Using Access Pattern Classification
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HPCA
2007
IEEE
15 years 3 months ago
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
Liqun Cheng, John B. Carter, Donglai Dai
97
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ISCA
2012
IEEE
261views Hardware» more  ISCA 2012»
13 years 14 hour ago
RAIDR: Retention-aware intelligent DRAM refresh
Dynamic random-access memory (DRAM) is the building block of modern main memory systems. DRAM cells must be periodically refreshed to prevent loss of data. These refresh operation...
Jamie Liu, Ben Jaiyen, Richard Veras, Onur Mutlu
DAMON
2009
Springer
15 years 4 months ago
Evaluating and repairing write performance on flash devices
In the last few years NAND flash storage has become more and more popular as price per GB and capacity both improve at exponential rates. Flash memory offers significant bene...
Radu Stoica, Manos Athanassoulis, Ryan Johnson, An...
IPPS
2000
IEEE
15 years 2 months ago
Dynamic Data Layouts for Cache-Conscious Factorization of DFT
Effective utilization of cache memories is a key factor in achieving high performance in computing the Discrete Fourier Transform (DFT). Most optimizationtechniques for computing ...
Neungsoo Park, Dongsoo Kang, Kiran Bondalapati, Vi...
ISCAS
2006
IEEE
142views Hardware» more  ISCAS 2006»
15 years 3 months ago
An efficient texture cache for programmable vertex shaders
Vertex texturing is state-of-the-art functionality of vertex. Thus, traditional texture caches used in RE are not the 3D geometry processor. However, it aggravates the always appli...
Seunghyun Cho, Chang-Hyo Yu, Lee-Sup Kim