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PLDI
1995
ACM
15 years 1 months ago
Storage Assignment to Decrease Code Size
DSP architectures typically provide indirect addressing modes with auto-increment and decrement. In addition, indexing mode is not available, and there are usually few, if any, ge...
Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Stev...
ICCAD
2005
IEEE
141views Hardware» more  ICCAD 2005»
15 years 6 months ago
Architecture and compilation for data bandwidth improvement in configurable embedded processors
Many commercially available embedded processors are capable of extending their base instruction set for a specific domain of applications. While steady progress has been made in t...
Jason Cong, Guoling Han, Zhiru Zhang
CC
2006
Springer
101views System Software» more  CC 2006»
15 years 1 months ago
SARA: Combining Stack Allocation and Register Allocation
Commonly-used memory units enable a processor to load and store multiple registers in one instruction. We showed in 2003 how to extend gcc with a stack-location-allocation (SLA) ph...
V. Krishna Nandivada, Jens Palsberg
167
Voted
CC
2009
Springer
190views System Software» more  CC 2009»
15 years 10 months ago
SSA Elimination after Register Allocation
form uses a notational abstractions called -functions. These instructions have no analogous in actual machine instruction sets, and they must be replaced by ordinary instructions ...
Fernando Magno Quintão Pereira, Jens Palsbe...
CSSE
2008
IEEE
15 years 4 months ago
Design and Implementation of the Virtual Machine Constructing on Register
: The technology of virtual machines is widely applied in many fields, such as code transplanting, cross-platform computing, and hardware simulation. The main purpose is to simulat...
Weibo Xie, Fu Ting