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159
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ASAP
2007
IEEE
112views Hardware» more  ASAP 2007»
15 years 8 months ago
Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis
In high-level synthesis, as for compilers, an important question is when register assignment should take place. Unlike compilers for which the processor architecture is given, syn...
Alain Darte, C. Quinson
ISCA
2012
IEEE
281views Hardware» more  ISCA 2012»
13 years 8 months ago
LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems
Memory system reliability is a serious and growing concern in modern servers. Existing chipkill-level memory protection mechanisms suffer from several drawbacks. They activate a l...
Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev B...
191
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BMCBI
2010
121views more  BMCBI 2010»
15 years 6 months ago
Knowledge-based annotation of small molecule binding sites in proteins
Background: The study of protein-small molecule interactions is vital for understanding protein function and for practical applications in drug discovery. To benefit from the rapi...
Ratna R. Thangudu, Manoj Tyagi, Benjamin A. Shoema...
MICRO
2009
IEEE
134views Hardware» more  MICRO 2009»
16 years 24 days ago
A case for dynamic frequency tuning in on-chip networks
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
Asit K. Mishra, Reetuparna Das, Soumya Eachempati,...
ICNP
2000
IEEE
15 years 10 months ago
An Image Transport Protocol for the Internet
Images account for a significant and growing fraction of Web downloads. The traditional approach to transporting images uses TCP, which provides a generic reliable, in-order eam ...
Suchitra Raman, Hari Balakrishnan, Murari Srinivas...