452 search results - page 57 / 91 » Incremental formal design verification |
CAV
2009
Springer
15 years 10 months ago
2009
Springer
D-Finder tool implements a compositional method for the verification of component-based systems described in BIP language encompassing multi-party interaction. For deadlock detecti...
CSCWD
2009
Springer
15 years 4 months ago
2009
Springer
Constrained random simulation methodology still plays an important role in hardware verification due to the limited scalability of formal verification, especially for the large an...
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FASE
2008
Springer
14 years 11 months ago
2008
Springer
We introduce a logical verification framework for checking functional properties of service-oriented applications formally specified using the service specification language COWS. ...
FOSSACS
2008
Springer
14 years 11 months ago
2008
Springer
Whereas formal verification of timed systems has become a very active field of research, the idealised mathematical semantics of timed automata cannot be faithfully implemented. Se...
CADE
2007
Springer
15 years 10 months ago
2007
Springer
Abstract. First order logic provides a convenient formalism for describing a wide variety of verification conditions. Two main approaches to checking such conditions are pure first...